upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 95

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

4.6 Idle State Insertion Function
read accesses every two blocks, one idle state (TI) can be inserted into the current bus cycle after the T3 state. The
following bus cycle starts after one idle state.
blocks.
(1) Bus cycle control register (BCC)
After reset: AAAAH
Symbol
BCC
To facilitate interfacing with low-speed memory devices and meeting the data output float delay time on memory
Specifying insertion of the idle state is programmable by using the bus cycle control register (BCC).
Immediately after the system has been reset, idle state insertion is automatically programmed for all memory
This register can be read/written in 16-bit units.
Block 0 is reserved for the internal ROM area, so no idle state can be specified.
The internal RAM area and on-chip peripheral I/O area of block 15 are not subject to insertion of an idle state.
Be sure to set bits 0, 2, 4, 6, 8, 10, 12, and 14 to 0. If these bits are set to 1, the operation is not guaranteed.
BC71
BCn1
15
0
1
n
0
1
2
3
4
5
6
7
Inserted
Blocks 0/1
Blocks 2/3
Blocks 4/5
Blocks 6/7
Blocks 8/9
Blocks 10/11
Blocks 12/13
Blocks 14/15
Not inserted
14
0
R/W
BC61
13
12
0
CHAPTER 4 BUS CONTROL FUNCTION
BC51
11
10
0
User’s Manual U12768EJ4V1UD
Address: FFFFF062H
Blocks into Which Idle State Is Inserted
BC41
Idle State Insertion Specification
9
0
8
BC31
7
0
6
BC21
5
0
4
BC11
3
0
2
BC01
1
0
0
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