upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 425

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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16.7.13 Calling device internal processing
environments are satisfied and that the necessary arguments and RAM parameters have been set. Call the device
internal processing by setting the FLSPM bit of the flash programming mode control register (FLPMC) to 1 and then
executing the trap 0x1f instruction. The processing is always called using the same procedure. It is assumed that the
program of this interface is described in an assembly language.
(1) Parameter
(2) Return value
(3) Description
This section explains the procedure to call the device internal processing from the entry program.
Before calling the device internal processing, make sure that all the conditions of the hardware and software
<1> Set the FLPMC register as follows:
<2> Clear the NP bit of the PSW to 0 (to enable NMIs (only when NMIs are used on the application)).
<3> Execute trap 0x1f to transfer the control to the device’s internal processing.
<4> Set the NP bit and ID bit of the PSW to 1 (to disable all interrupts).
<5> Set the value to the peripheral command register (PHCMD) that is to be set to the FLPMC register.
<6> Set the FLPMC register as follows:
<7> Wait for the internal manipulation setup time (see 16.7.13 (5) Internal manipulation setup parameter).
r6: First argument (sets a self-programming function number)
r7: Second argument
r8: Third argument
r9: Fourth argument
ep: First address of RAM parameter
r10:
ep+4:Bit 7: NMI flag (flag indicating whether an NMI occurred while the device internal processing was being
Transfer control to the device internal processing specified by a function number using the trap instruction.
To do this, the hardware and software environmental conditions must be satisfied. Even if trap 0x1f is used in
the user application program, trap 0x1f is treated as another operation after the FLPMC register has been set.
Therefore, use of the trap instruction is not restricted on the application.
• VPPDIS bit = 0 (to enable writing/erasing flash memory)
• FLSPM bit = 1 (to select self-programming mode)
• VPPDIS bit = 1 (to disable writing/erasing flash memory)
• FLSPM bit = 0 (to select normal operation mode)
Return value (return value from device internal processing of 4 bytes)
executed)
If an NMI occurs while control is being transferred to the device internal processing, the NMI
request may never be reflected. Because the NMI flag is not internally reset, this bit must be
cleared before calling the device internal processing. After the control returns from the device
internal processing, NMI dummy processing can be executed by checking the status of this flag
using software.
0: NMI did not occur while device internal processing was being executed.
1: NMI occurred while device internal processing was being executed.
CHAPTER 16 FLASH MEMORY
User’s Manual U12768EJ4V1UD
425

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