upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 86

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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3.4.9 Specific registers
execution, etc. The write access of these specific registers is executed in a specific sequence, and if abnormal write
operations occur, it is checked by the PRERR bit of the system status register (SYS). The V850/SA1 has three
specific registers, the power save control register (PSC), processor clock control register (PCC), and flash
programming mode control register (FLPMC). For details of the PSC register, refer to 6.3.1 (2) Power save control
register (PSC), for details of the PCC register, refer to 6.3.1 (1) Processor clock control register (PCC), and for
details of the FLPMC register, refer to 16.7.12 Flash programming mode control register (FLPMC).
86
Specific registers are registers that are protected from being written with illegal data due to erroneous program
The following sequence shows the data setting of the specific registers.
<1> Disable DMA operation.
<2> Set the PSW NP bit to 1 (interrupt disabled).
<3> Write any 8-bit data in the command register (PRCMD).
<4> Write the set data in the specific registers (using the following instructions).
<5> Return the PSW NP bit to 0 (interrupt disable canceled).
<6> If necessary, enable DMA operation.
No special sequence is required when reading the specific registers.
Cautions 1. If an interrupt request or a DMA request is acknowledged between the time PRCMD is
Store instruction (ST/SST instruction)
Bit manipulation instruction (SET1/CLR1/NOT1 instruction)
generated (<3>) and the specific register write operation (<4>) that follows immediately after,
the write operation to the specific register is not performed and a protection error (PRERR bit
of SYS register is 1) may occur. Therefore, set the NP bit of PSW to 1 (<2>) to disable the
acknowledgement of INT/NMI or to disable DMA transfer.
The above also applies when a bit manipulation instruction is used to set a specific register.
A description example is given below.
[Description example]: In case of PCC register
LDSR rX.5
ST.B r0, PRCMD [r0]
ST.B rD, PCC [r0]
LDSR rY, 5
When saving the value of PSW, the value of PSW prior to setting the NP bit must be
transferred to the rY register.
rX: Value to be written to PSW
rY: Value to be written back to PSW
rD: Value to be set to PCC
.
.
.
CHAPTER 3 CPU FUNCTIONS
User’s Manual U12768EJ4V1UD
; NP bit = 1
; Write to PRCMD
; PCC register setting
; NP bit = 0

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