upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 273

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

10.3.12 Communication reservation
made to enable transmission of a start condition when the bus is released. There are two modes under which the bus
is not used.
• When arbitration results in neither master nor slave operation
• When an extension code is received and slave operation is disabled (ACK is not returned and the bus was released
is set after the bus is released (after a stop condition is detected).
the master’s address transfer to start. At this point bit 4 (SPIE) of IICC0 should be set.
according to the bus status.
If the bus has been released.................................................. a start condition is generated
If the bus has not been released (standby mode) .................. communication reservation
(bit 7 of IIC status register 0 (IICS0)).
settings for bits 3, 1, and 0 (SMC, CL1, and CL0) of IIC clock select register 0 (IICCL0).
when bit 6 (LREL) of IIC control register 0 (IICC0) was set to 1).
To start master device communications when not currently using the bus, a communication reservation can be
If bit 1 (STT) of IICC0 is set while the bus is not used, a start condition is automatically generated and a wait status
When the bus release is detected (when a stop condition is detected), writing to IIC shift register 0 (IIC0) causes
When STT has been set, the operation mode (as start condition or as communication reservation) is determined
To detect which operation mode has been determined for STT, set STT, wait for the wait period, then check MSTS
Wait periods, which should be set via software, are listed in Table 10-6. These wait periods can be set via the
SMC
0
0
0
0
1
1
1
1
CHAPTER 10
CL1
Table 10-6. Wait Periods
0
0
1
1
0
0
1
1
User’s Manual U12768EJ4V1UD
SERIAL INTERFACE FUNCTION
CL0
0
1
0
1
0
1
0
1
26 clocks
46 clocks
92 clocks
37 clocks
16 clocks
32 clocks
13 clocks
Wait Period
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