upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 157

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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(3) Capture/compare registers 01, 11 (CR01, CR11)
Remark
ESn01
This is a 16-bit register that can be used as a capture register and a compare register. Whether it is used as a
capture register or compare register is specified by bit 2 (CRCn2) of the CRCn register.
(a) When using CRn1 as compare register
(b) When using CRn1 as capture register
CRn1 is set by using a 16-bit memory manipulation instruction. These registers can be read/written when used
as compare registers and can only be read when used as capture registers.
The value of this register is set to 0000H after the RESET signal is input.
0
0
1
1
The value set to CRn1 is always compared with the count value of TMn. When the values of the two match,
an interrupt request (INTTMn1) is generated.
The valid edge of the TIn0 pin can be selected as a capture trigger. The valid edge of TIn0 is specified by
using the PRMn register.
Caution In a mode in which the timer is cleared and started on a match between TMn and CRn0,
n = 0, 1
ESn00
0
1
0
1
set the CRn1 register to other than 0000H. In the free-running mode or the TIn0 valid
edge clear mode, however, an interrupt request (INTTMn1) is generated after an overflow
(FFFFH) when CRn1 is set to 0000H.
Table 7-4. Valid Edge of TIn0 Pin and Capture Trigger of CRn1
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
CHAPTER 7 TIMER/COUNTER FUNCTION
Valid Edge of TIn0 Pin
User’s Manual U12768EJ4V1UD
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
CRn1 Capture Trigger
157

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