upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 6

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

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Page
Addition of
Deletion of
Addition of Table 1-1 List of V850/SA1 Products
Addition of description to minimum instruction execution time in 1.2 Features
Deletion and addition of products in 1.4 Ordering Information
Deletion and addition of products in 1.5 Pin Configuration
Deletion of description in 1.6.2 (2) Bus control unit (BCU)
Addition of Table 2-1 Pin I/O Buffer Power Supplies
Modification of description in Table 2-2 Operating States of Pins in Each Operating Mode
Modification of description in 2.3 (7) P60 to P65 (Port 6)
Addition of 2.3 (13) CLKOUT (Clock out)
Addition and modification of description in 2.4 Pin I/O Circuits and Recommended Connection of Unused
Pins
Modification of 2.5 Pin I/O Circuits
Addition of description to minimum instruction execution time in 3.1 Features
Change of description in 3.2.2 (2) Program status word (PSW)
Modification of Figure 3-16 Recommended Memory Map
Addition of description in 3.4.8 Peripheral I/O registers
Addition and modification of description in 3.4.9 Specific registers
Addition of description in 5.2.4 Noise elimination of external interrupt request input pin
Addition of description in 5.2.5 Edge detection function of external interrupt request input pin
Addition to Cautions in 5.3.4 Interrupt control register (xxICn)
Addition of Caution in 5.3.5 In-service priority register (ISPR)
Addition of 5.8.1 Interrupt request valid timing after EI instruction
Addition of 5.9 Bit Manipulation Instruction of Interrupt Control Register During DMA Transfer
Modification of description in 6.1 (1) Main clock oscillator
Modification of description in 6.1 (2) Subclock oscillator
Modification of Figure 6-1 Clock Generator
Addition to Notes in 6.3.1 (1) Processor clock control register (PCC)
Modification of description in 6.3.1 (1) (b) Example of subclock operation → main clock operation setup
Addition to Notes and Cautions in 6.3.1 (2) Power save control register (PSC)
Modification of description in 6.4.4 (1) Settings and operating states
Addition of 6.6 Notes on Power Save Function
Modification of Caution in 7.1.3 (2) Capture/compare registers 00, 10 (CR00, CR10)
Modification of Caution in 7.1.3 (3) Capture/compare registers 01, 11 (CR01, CR11)
Change of Figure 7-27 Data Hold Timing of Capture Register
Addition of 7.2.7 (6) (c) One-shot output function
Addition of 7.3.1 Outline
µ
µ
PD703014B, 703014BY, 703015B, 703015BY, 70F3015B, and 70F3015BY
PD703014AGC, 703014AYGC, 703015AGC, and 703015AYGC
The mark
Major Revisions in This Edition (1/2)
User’s Manual U12768EJ4V1UD
shows major revised points.
Description