upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 142

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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(2) Power save control register (PSC)
142
After reset:
PSC
This is a specific register. It can be written to only when a specified combination of sequences is used (see 3.4.9
Specific registers).
This register can be read/written in 8-bit or 1-bit units.
Notes 1. When IDLE mode is released, this bit is automatically reset to 0.
Cautions 1. The DCLK0 and DCLK1 bits should be manipulated in 8-bit units.
C0H
DCLK1
DCLK1
IDLE
STP
7
0
0
1
1
0
1
0
1
2.
3.
2. Do not set (1) the IDLE bit and STP bit at the same time.
3. Be sure to set bits 3 to 5 to 0.
When software STOP mode is released, this bit is automatically reset to 0.
When the CPU operates on the subclock (CK2 = 1), do not set the STP bit to 1.
R/W
simultaneously, the software STOP mode is entered.
Normal mode
IDLE mode
Normal mode
Software STOP mode
DCLK0
DCLK0
0
1
0
1
6
CHAPTER 6 CLOCK GENERATION FUNCTION
Note 1
Address: FFFFF070H
Output enabled
Setting prohibited
Setting prohibited
Output disabled (when reset)
User’s Manual U12768EJ4V1UD
5
0
Notes 2, 3
4
0
Software STOP Mode Setting
Specification of CLKOUT Pin Operation
IDLE Mode Setting
3
0
IDLE
2
STP
1
If they are set
0
0

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