upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 139

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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6.2 Configuration
6.3 Clock Output Function
is output via the CLKOUT pin.
Remark
This function outputs the CPU clock via the CLKOUT pin.
When clock output is enabled, the CPU clock is output via the CLKOUT pin. When it is disabled, a low-level signal
Output is stopped in the IDLE or software STOP mode (fixed to low level).
This function is controlled via the DCLK1 and DCLK0 bits in the PSC register.
The high-impedance status is set during the reset period. After reset is released, a low level is output.
Caution While CLKOUT is being output, do not change the CPU clock (CK2 to CK0 bits of PCC register).
XT1/P114
CLKOUT
XT2
X1
X2
f
f
XX
XT
: Subclock frequency
: Main clock frequency
Main clock
oscillator
Subclock
oscillator
MFRC
STP,
MCK
f
XT
CHAPTER 6 CLOCK GENERATION FUNCTION
IDLE
control
Figure 6-1. Clock Generator
f
User’s Manual U12768EJ4V1UD
XX
IDLE
f
XX
Prescaler
/2 f
XX
Prescaler
/4 f
XX
/8
IDLE
control
f
XT
CK2 to CK0
HALT
HALT
control
CPU clock
(f
Clock supplied to
peripheral hardware
Clock supplied to
watch timer, etc.
CPU
)
139

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