upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 191

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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(1) 8-bit counters 2 to 5 (TM2 to TM5)
(2) 8-bit compare registers 2 to 5 (CR20 to CR50)
TMn is an 8-bit read-only register that counts the count pulses.
The counter is incremented in synchronization with the rising edge of the count clock.
Through cascade connection, TM2 and TM3, and TM4 and TM5 can be used as 16-bit timers.
When using TMm and TMm + 1 in cascade as a 16-bit timer, the timer can be read using a 16-bit memory
manipulation instruction. However, because these timers are connected by an internal 8-bit bus, TMm and TMm
+ 1 must be read twice. Therefore, read these timers twice and compare the values, bearing in mind that the
reading occurs during a count change.
When the count is read out during operation, the count clock input temporarily stops and the count is read at that
time. In the following cases, the count becomes 00H.
(1) RESET is input.
(2) TCEn is cleared.
(3) TMn and CRn0 match in the clear and start mode that occurs when TMn and CRn0 match.
The CRn0 register is set by an 8-bit memory manipulation instruction.
The value set in CRn0 is always compared to the count value in 8-bit counter n (TMn). If the two values match,
an interrupt request (INTTMn) is generated (except in the PWM mode).
The value of CRn0 can be set in the range of 00H to FFH, and can be written during counting.
When using TMm and TMm + 1 in cascade as a 16-bit timer, CRm0 and CR (m + 1) 0 operate as a 16-bit
compare register that is set by a 16-bit memory manipulation instruction. The counter and register values are
compared in 16-bit lengths, and if they match, an interrupt request (INTTMm) is generated. Because the interrupt
request INTTMm + 1 is also generated at this time, be sure to mask interrupt request INTTMm + 1 when using
TMm and TMm + 1 in cascade connection.
RESET input sets these registers to 00H.
Remark
Remark
Caution When connected in cascade, these registers become 00H even when TCEn in the lowest
Caution If data is set in a cascade connection, always set after stopping the timer.
n = 2 to 5
n = 2 to 5
timer (TM2, TM4) is cleared.
m = 2, 4
m = 2, 4
CHAPTER 7
User’s Manual U12768EJ4V1UD
TIMER/COUNTER FUNCTION
191

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