upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 479

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Instruction Set List (4/4)
Special
Instruction
Note The opcode of this instruction uses the field of reg1 even though the source register is shown as reg2 in the
Group
above table. Therefore, the meaning of the register specification for mnemonic description and opcode is
different from that of the other instructions.
rrrrr = regID specification
RRRRR = reg2 specification
LDSR
STSR
TRAP
RETI
HALT
DI
EI
NOP
Mnemonic
reg2, regID rrrrr111111RRRRR
regID, reg2 rrrrr111111RRRRR
vector
Operand
APPENDIX C LIST OF INSTRUCTION SETS
0000000000100000
0000000001000000
00000111111iiiii
0000000100000000
0000011111100000
0000000101000000
0000011111100000
0000000100100000
0000011111100000
0000000101100000
1000011111100000
0000000101100000
0000000000000000 Uses 1 clock cycle without doing anything
Opcode
User’s Manual U12768EJ4V1UD
Note
SR [regID] ←GR
[reg2]
GR [reg2] ← SR [regID]
EIPC
EIPSW
ECR.EICC
PSW.EP
PSW.ID
PC ← 00000040H (vector = 00H to 0FH)
if PSW.EP = 1
Stops
PSW.ID ← 1
(Maskable interrupt disabled)
PSW.ID ← 0
(Maskable interrupt enabled)
then PC
else if PSW.NP = 1
00000050H (vector = 10H to 1FH)
PSW ← EIPSW
then PC ← FEPC
else PC ← EIPC
← PC + 4 (Restored PC)
← PSW
← Interrupt code
← 1
← 1
← EIPC
PSW ← FEPSW
PSW ← EIPSW
Operation
regID = EIPC, FEPC
regID = EIPSW,
FEPSW
regID = PSW
CY OV S
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