upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 250

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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is canceled and the transmitting side writes data to IIC0 to cancel the wait status.
250
A wait may be automatically generated depending on the setting for bit 3 (WTIM) of IIC control register 0 (IICC0).
Normally, when bit 5 (WREL) of IICC0 is set to 1 or when FFH is written to IIC shift register 0 (IIC0), the wait status
The master device can also cancel the wait status via either of the following methods.
• By setting bit 1 (STT) of IICC0 to 1
• By setting bit 0 (SPT) of IICC0 to 1
Transfer lines
Master
Slave
Remark
ACKE
SDA
SCL
SCL
SCL
IIC0
IIC0
ACKE: Bit 2 of IIC control register 0 (IICC0)
WREL: Bit 5 of IIC control register 0 (IICC0)
H
(b) When master and slave devices both have a nine-clock wait
Output according to previously set ACKE value
(master: transmission, slave: reception, and ACKE = 1)
D2
6
6
CHAPTER 10
D1
7
7
Master and slave both wait
after output of ninth clock
Figure 10-14. Wait Signal (2/2)
D0
8
8
User’s Manual U12768EJ4V1UD
ACK
9
9
SERIAL INTERFACE FUNCTION
IIC0 data write (cancel wait)
1
D7
FFH is written to IIC0 or WREL is set to 1
1
D6
2
2
D5
3
3

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