upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 43

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

2.2 Pin States
Pin
AD0 to AD15
A1 to A15
A16 to A21
LBEN, UBEN
R/W
DSTB, WRL, WRH, RD
ASTB
HLDRQ
HLDAK
WAIT
CLKOUT
The operating states of various pins are described below with reference to their operating modes.
Remark
Notes 1.
2.
3.
4.
Operating State
Hi-Z: High impedance
Held: State is held during previously set external bus cycle
L:
H:
−:
Pins (except the CLKOUT pin) are used as port pins (input mode) after reset.
The bus cycle inactivation timing occurs when the internal memory area is specified by the program
counter (PC) in the external expansion mode.
• When the external memory area has not been accessed even once after reset is released and the
• When the bus cycle is inactivated after access to the external memory area, or when the external
Low level (L) when in clock output inhibit mode
external expansion mode is set: Undefined
memory area has not been accessed even once after the external expansion mode is released and
set again: The state of the external bus cycle when the external memory area accessed last is held.
Low-level output
High-level output
Input without sampling sampled (not acknowledged)
Table 2-2. Operating States of Pins in Each Operating Mode
Reset
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
—
—
Note 1
CHAPTER 2 PIN FUNCTIONS
User’s Manual U12768EJ4V1UD
Operating
HALT Mode/
Operating
Operating
Idle State
Held
Held
Held
Hi-Z
—
H
H
H
Note 4
Software STOP
IDLE Mode/
Mode
Held
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
—
—
L
Operating
Operating
Bus Hold
Held
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
—
L
Note 4
Operating
Inactive
Bus Cycle
Operating
Operating
Held
Held
Held
Hi-Z
—
H
H
H
Note 3
Note 3
Note 3
Note 2
Note 4
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