upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 456

no-image

upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
upd70f3017ayGC-8EU-A
Manufacturer:
MICROCHIP
Quantity:
1 001
I
(T
456
2
SCL clock frequency
Bus-free time (between stop/start
conditions)
Hold time
SCL clock low-level width
SCL clock high-level width
Setup time for start/restart
condition
Data hold
time
Data setup time
SDA and SCL signal rise time
SDA and SCL signal fall time
Stop condition setup time
Width of spike pulse suppressed
by input filter
Capacitance load of each bus line
C Bus Mode (
A
Notes 1.
Remark The maximum operating frequency of the
= –40 to +85°C, V
Note 1
2.
3.
4.
5.
Parameter
70F3015BY, and
At the start condition, the first clock pulse is generated after the hold time.
The system requires a minimum of 300 ns hold time internally for the SDA signal in order to occupy the
undefined area at the falling edge of SCL.
If the system does not extend the SCL signal low hold time (t
(t
The high-speed mode I
high-speed mode I
Cb: Total capacitance of one bus line (unit: pF)
µ
HD:DAT
CBUS compatible
master
I
• If the system does not extend the SCL signal's low state hold time:
• If the system extends the SCL signal's low state hold time:
2
PD703014AY, 703014BY, 703015AY, 703015BY, 703017AY, 70F3015BY, 70F3017AY only)
C mode
t
Transmit the following data bit to the SDA line prior to the SCL line release (t
250 = 1,250 ns: Normal mode I
SU:DAT
) needs to be satisfied.
DD
≥ 250 ns
= AV
DD
µ
PD70F3017AY is f
= BV
2
C bus so that it meets the following conditions.
f
t
t
t
t
t
t
t
t
t
t
t
Cb
CLK
BUF
HD:STA
LOW
HIGH
SU:STA
HD:DAT
SU:DAT
R
F
SU:STO
SP
CHAPTER 17 ELECTRICAL SPECIFICATIONS
DD
Symbol
2
C bus can be used in the normal-mode I
= 2.7 to 3.6 V, V
<70>
<71>
<72>
<73>
<74>
<75>
<76>
<77>
<78>
<79>
<80>
User’s Manual U12768EJ4V1UD
2
C bus specification).
XX
= 17 MHz.
µ
MIN.
0
250
4.7
4.0
4.7
4.0
4.7
5.0
4.0
Note 2
PD703014AY, 703014BY, 703015AY, 703015BY, 703017AY,
0
SS
Normal Mode
= AV
SS
= BV
MAX.
1000
100
300
400
SS
= 0 V, C
LOW
2
20 + 0.1Cb
20 + 0.1Cb
C bus system. In this case, set the
), only the maximum data hold time
L
100
= 50 pF)
MIN.
0
1.3
0.6
1.3
0.6
0.6
0.6
Note 2
High-Speed Mode
0
0
Note 4
Note 5
Note 5
Rmax.
0.9
+ t
MAX.
400
300
300
400
50
Note 3
SU:DAT
= 1,000 +
Unit
kHz
pF
µ
µ
µ
µ
µ
µ
µ
ns
ns
ns
µ
ns
s
s
s
s
s
s
s
s

Related parts for upd70f3017ay