upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 238

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

238
After reset: 00H
(2) IIC status register 0 (IICS0)
IICS0
IICS0 indicates the status of the I
IICS0 can be set by a 1-bit or 8-bit memory manipulation instruction. IICS0 is a read-only register.
RESET input sets IICS0 to 00H.
Note This register is also cleared when a bit manipulation instruction is executed for bits other than IICS0.
Remark
Condition for clearing (MSTS = 0)
• When a stop condition is detected
• When ALD = 1
• Cleared by LREL = 1
• When IICE changes from 1 to 0
• When RESET is input
Condition for clearing (ALD = 0)
• Automatically cleared after IICS is read
• When IICE changes from 1 to 0
• When RESET is input
MSTS
MSTS
ALD
7
0
1
0
1
LREL: Bit 6 of IIC control register 0 (IICC0)
IICE:
R
Slave device status or communication standby status
Master device communication status
This status means either that there was no arbitration or that the arbitration result was a “win”.
This status indicates the arbitration result was a “loss”. MSTS is cleared.
ALD
6
Bit 7 of IIC control register 0 (IICC0)
EXC
CHAPTER 10
5
2
C bus.
User’s Manual U12768EJ4V1UD
Address: FFFFF342H
COI
Note
4
SERIAL INTERFACE FUNCTION
Detection of Arbitration Loss
TRC
Master Device Status
3
Condition for setting (MSTS = 1)
• When a start condition is generated
Condition for setting (ALD = 1)
• When the arbitration result is a “loss”.
ACKD
2
STD
1
SPD
0
(1/3)