upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 342

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

(1) Real-time output buffer registers (RTBL, RTBH)
(2) Output latch
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Notes 1. Only the bits set in the real-time output port mode (RTPM) can be read. If a bit set in the port mode is
RTBL and RTBH are 4-bit registers that hold output data in advance.
These registers are mapped to independent addresses in the special function register (SFR) area as shown in
Figure 13-2.
If an operation mode of 4 bits × 2 channels is specified, data can be individually set to RTBL and RTBH. The data
of both the registers can be read all at once by specifying the address of either of the registers.
If an operation mode of 8 bits × 1 channel is specified, 8-bit data can be set to both RTBL and RTBH respectively
by writing the data to either of the registers. The data of both the registers can be read all at once by specifying
the address of either of the registers.
These registers are set by an 8-bit memory manipulation instruction.
RESET input sets these registers to 00H.
Figure 13-2 shows the configuration of RTBL and RTBH, and Table 13-2 shows the operation to be performed
when RTBL and RTBH are manipulated.
This is the output latch to which the value set by the real-time output buffer register (RTBL, RTBH) is
automatically transferred when the real-time output trigger occurs. Output latches cannot be accessed.
A port specified as a real-time output port cannot set data to the port output latch. To set the initial values of the
real-time output port, set data to the port output latch in the port mode and then set to the real-time output port
mode (refer to 13.5 Usage).
4 bits × 2 channels
8 bits × 1 channel
Operation Mode
2. Set output data to RTBL and RTBH after setting the real-time output port until the real-time output
read, 0 is read.
trigger is generated.
Table 13-2. Operation When Real-Time Output Buffer Registers Are Manipulated
Figure 13-2. Configuration of Real-Time Output Buffer Registers
RTBL
RTBH
RTBL
RTBH
Register to Be
Manipulated
CHAPTER 13 REAL-TIME OUTPUT FUNCTION (RTO)
Higher 4 bits
RTBH
User’s Manual U12768EJ4V1UD
RTBH
RTBH
RTBH
RTBH
Higher 4 bits
Read
Note 1
RTBL
RTBL
RTBL
RTBL
Lower 4 bits
Lower 4 bits
RTBL
Invalid
RTBH
RTBH
RTBH
Higher 4 bits
Write
Note 2
RTBL
Invalid
RTBL
RTBL
Lower 4 bits