upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 126

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

5.3.6 ID flag
As a status flag, it also displays the current maskable interrupt acknowledgment status.
After reset: 00000020H
5.3.7 Watchdog timer mode register (WDTM)
After reset: 00H
126
Symbol
Symbol
PSW
WDTM
The interrupt disable status flag (ID) of the PSW controls the enabling and disabling of maskable interrupt requests.
This register can be read/written in 8-bit or 1-bit units (for details, refer to CHAPTER 9 WATCHDOG TIMER).
31
Note Interrupt disable flag (ID) function
Remark
Caution If the RUN or WDTM4 bit is set to 1, it cannot be cleared other than by reset input.
WDTM4
RUN
RUN
ID
0
1
0
1
0
1
7
It is set to 1 by the DI instruction and reset to 0 by the EI instruction. Its value is also modified by
the RETI instruction or LDSR instruction when referencing the PSW.
Non-maskable interrupt requests and exceptions are acknowledged regardless of this flag. When
a maskable interrupt request is acknowledged, the ID flag is automatically set to 1 by hardware.
The interrupt request generated during the acknowledgement disabled period (ID = 1) can be
acknowledged when the xxIFn bit of xxICn is set to 1, and the ID flag is reset to 0.
R/W
xx: Identification name of each peripheral unit (refer to Table 5-2)
n:
Maskable interrupt request acknowledgement enabled
Maskable interrupt request acknowledgement disabled
Count operation stopped
Count start after clearing
Interval timer mode
WDT mode
Number of each peripheral unit (refer to Table 5-2)
6
0
CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION
0
5
0
Figure 5-9. Interrupt Disable Flag (ID)
Timer Mode Selection/Interrupt Control by WDT
Maskable Interrupt Servicing Specification
Watchdog Timer Operation Control
WDTM4
User’s Manual U12768EJ4V1UD
Address: FFFFF384H
4
3
0
8
NP EP ID SAT CY OV
7
2
0
6
5
Note
4
1
0
3
2
S
1
0
0
Z
0