upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 138

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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6.1 General
hardware. There are two types of clock oscillators.
(1) Main clock oscillator
(2) Subclock oscillator
138
The clock generator is a circuit that generates the clock pulses that are supplied to the CPU and peripheral
This oscillator has an oscillation frequency of 2 to 20 MHz. Oscillation can be stopped by setting the software
STOP mode or by setting the processor clock control register (PCC). Oscillation is also stopped during a reset.
External clocks can be directly input. At this time, input a clock signal only to the X1 pin and leave the X2 pin
open.
This circuit has an oscillation frequency of 32.768 kHz. Its oscillation is not stopped when the software STOP
mode is set, neither is it stopped when a reset is input. To stop oscillation, connect the XT1 pin to V
External clocks can be directly input. At this time, input a clock signal to the XT1 pin and input its inverted signal
to the XT2 pin.
Cautions 1. When the main clock oscillator is stopped by inputting a reset or setting the software
2. If stoppage of the main clock is released by clearing MCK to 0 after the main clock is
STOP mode, the oscillation stabilization time is secured after the stop mode is released.
This oscillation stabilization time is set via the oscillation stabilization time select
register (OSTS). The watchdog timer is used as the timer that counts the oscillation
stabilization time.
stopped by setting the MCK bit in the PCC register to 1, the oscillation stabilization time
is not secured.
CHAPTER 6 CLOCK GENERATION FUNCTION
User’s Manual U12768EJ4V1UD
SS
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