MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 101
MC68HC708AS48
Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC68HC708AS48.pdf
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8.4.2 Phase-Locked Loop Circuit (PLL)
8.4.2.1 Circuits
MC68HC708AS48
MOTOROLA
Addr.
$001C
$001D
$001E
PLL Programming Register
PLL Bandwidth Control
PLL Control Register
Register Name
—
Register (PBWC)
See page 112.
See page 114.
See page 116.
Rev. 4.0
(PCTL)
The PLL is a frequency generator that can operate in either acquisition
mode or tracking mode, depending on the accuracy of the output
frequency. The PLL can change between acquisition and tracking
modes either automatically or manually. Refer to
Conditions
The PLL consists of these circuits:
(PPG)
•
•
•
•
•
Figure 8-2. CGM I/O Register Summary
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Voltage-controlled oscillator (VCO)
Modulo VCO frequency divider
Phase detector
Loop filter
Lock detector
Clock Generator Module (CGM)
Bit 7
PLLIE
AUTO
MUL7
for operating frequencies while reading this section.
R
0
0
0
= Reserved
LOCK
MUL6
PLLF
R
R
6
0
0
1
PLLON
MUL5
ACQ
5
1
0
1
MUL4
BCS
XLD
4
0
0
0
VRS7
3
R
R
1
1
0
0
0
Clock Generator Module (CGM)
21.9 CGM Operating
VRS6
2
R
R
1
1
0
0
1
Functional Description
Advance Information
VRS5
R
R
1
1
1
0
0
1
Bit 0
VRS4
R
R
1
1
0
0
0
101
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