MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 132

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
System Integration Module (SIM)
9.4.2 Active Resets from Internal Sources
Advance Information
132
All internal reset sources actively pull the RST pin low for 32 CGMXCLK
cycles to allow resetting of external peripherals. The internal reset signal
IRST continues to be asserted for an additional 32 cycles.
See
illegal opcode, COP timeout, LVI, or POR. (See
for LVI or POR resets, the SIM cycles through 4096 CGMXCLK cycles
during which the SIM forces the RST pin low. The internal reset signal
then follows the sequence from the falling edge of RST shown in
Figure
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals
and other chips within a system built around the MCU.
CGMXCLK
IRST
RST
Figure
IAB
9-5.
System Integration Module (SIM)
9-5. An internal reset can be caused by an illegal address,
Figure 9-6. Sources of Internal Reset
Figure 9-5. Internal Reset Timing
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
RST PULLED LOW BY MCU
32 CYCLES
COPRST
POR
LVI
INTERNAL RESET
32 CYCLES
MC68HC708AS48
Figure
9-6.) Note that
VECTOR HIGH
MOTOROLA
Rev. 4.0

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