MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 198

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Input/Output (I/O) Ports
Advance Information
198
NOTE:
NOTE:
PTD7/ATD15 is available only in the 64-pin QFP package
Data direction register D (DDRD) does not affect the data direction of
port D pins that are being used by the ADC. However, the DDRD bits
always determine whether reading port D returns the states of the
latches or logic 0.
TCLK — Timer Clock Input Bit
Do not use ADC channel ATD14 when using the PTD6/ATD14/TCLK pin
as the clock input for the TIM.
be 0 if the data direction for this bit is programmed as an input.
Otherwise, the data will reflect the value in the data latch. (See
Section 19. Analog-to-Digital Converter
The PTD6/ATD14/TCLK pin is the external clock input for the TIM.
The prescaler select bits, PS[2:0], select PTD6/ATD14/TCLK as the
TIM clock input. (See
When not selected as the TIM clock, PTD6/ATD14/TCLK is available
for general-purpose I/O or as an ADC channel.
Input/Output (I/O) Ports
16.9.1 TIM Status and Control
(ADC).)
MC68HC708AS48
Register.)
MOTOROLA
Rev. 4.0

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