MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 176

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Computer Operating Properly (COP)
13.8 Low-Power Modes
13.8.1 Wait Mode
13.8.2 Stop Mode
13.9 COP Module During Break Interrupts
Advance Information
176
NOTE:
The following subsections describe the low-power modes.
The COP continues to operate during wait mode. To prevent a COP
reset during wait mode, periodically clear the COP counter in a CPU
interrupt routine.
If the COP is enabled in wait mode, it must be periodically refreshed.
Stop mode turns off the CGMXCLK input to the COP and clears the SIM
counter. Service the COP immediately before entering or after exiting
stop mode to ensure a full COP timeout period after entering or exiting
stop mode.
The STOP bit in the CONFIG register ($001F) (see
Register) enables the STOP instruction. To prevent inadvertently
turning off the COP with a STOP instruction, disable the STOP
instruction by programming the STOP bit to logic 0.
The COP is disabled during a break interrupt when V
5.0 Volt DC Electrical
Computer Operating Properly (COP)
Characteristics) is present on the RST pin.
MC68HC708AS48
5.4 Configuration
DD
+ V
HI
MOTOROLA
(see
Rev. 4.0
21.5

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