MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 271



Manufacturer Part Number
Advance Information
FREESCALE [Freescale Semiconductor, Inc]
17.9.3 SCI Control Register 3
Rev. 4.0
RWU — Receiver Wakeup Bit
SBK — Send Break Bit
Do not toggle the SBK bit immediately after setting the SCTE bit
because toggling SBK too early causes the SCI to send a break
character instead of a preamble.
SCI control register 3:
This read/write bit puts the receiver in a standby state during which
receiver interrupts are disabled. The WAKE bit in SCC1 determines
whether an idle input or an address mark brings the receiver out of the
standby state and clears the RWU bit. Reset clears the RWU bit.
Setting and then clearing this read/write bit transmits a break
character followed by a logic 1. The logic 1 after the break character
guarantees recognition of a valid start bit. If SBK remains set, the
transmitter continuously transmits break characters with no logic 1s
between them. Reset clears the SBK bit.
1 = Standby state
0 = Normal operation
1 = Transmit break characters
0 = No break characters transmitted
Stores the ninth SCI data bit received and the ninth SCI data bit to
be transmitted
Enables these interrupts:
– Receiver overrun interrupts
– Noise error interrupts
– Framing error interrupts
– Parity error interrupts
Serial Communications Interface (SCI)
Serial Communications Interface (SCI)
Advance Information
I/O Registers

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