MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 327

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

19.8.2 ADC Data Register
19.8.3 ADC Input Clock Register
MC68HC708AS48
MOTOROLA
—
Rev. 4.0
Address:
Address:
One 8-bit result register is provided. This register is updated each time
an ADC conversion completes.
This register selects the clock frequency for the ADC.
ADIV2:ADIV0 — ADC Clock Prescaler Bits
Reset:
Reset:
Read:
Read:
Write:
Write:
ADIV2, ADIV1, and ADIV0 form a 3-bit field which selects the divide
ratio used by the ADC to generate the internal ADC clock.
shows the available clock configurations. The ADC clock should be
set to approximately 1 MHz.
$003A
ADIV2
$0039
Bit 7
AD7
Bit 7
Figure 19-4. ADC Input Clock Register (ADICLK)
Analog-to-Digital Converter (ADC)
R
R
R
0
Figure 19-3. ADC Data Register (ADR)
= Reserved
= Reserved
ADIV1
AD6
R
6
6
0
ADIV0
AD5
R
5
5
0
Indeterminate after Reset
ADICLK
AD4
R
4
4
0
AD3
R
R
3
3
0
0
Analog-to-Digital Converter (ADC)
AD2
R
R
2
2
0
0
Advance Information
AD1
R
R
1
1
0
0
Table 19-2
I/O Registers
Bit 0
Bit 0
AD0
R
R
0
0
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