MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 264
MC68HC708AS48
Manufacturer Part Number
MC68HC708AS48
Description
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Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC68HC708AS48.pdf
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Serial Communications Interface (SCI)
17.8 I/O Signals
17.8.1 PTE0/TxD (Transmit Data)
17.8.2 PTE1/RxD (Receive Data)
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264
write I/O registers during the break state without affecting status bits.
Some status bits have a two-step read/write clearing procedure. If
software does the first step on such a bit before the break, the bit cannot
change during the break state as long as BCFE is at logic 0. After the
break, doing the second step clears the status bit.
Port E shares two of its pins with the SCI module. The two SCI I/O pins
are:
The PTE0/TxD pin is the serial data output from the SCI transmitter. The
SCI shares the PTE0/TxD pin with port E. When the SCI is enabled, the
PTE0/TxD pin is an output regardless of the state of the DDRE0 bit in
data direction register E (DDRE).
The PTE1/RxD pin is the serial data input to the SCI receiver. The SCI
shares the PTE1/RxD pin with port E. When the SCI is enabled, the
PTE1/RxD pin is an input regardless of the state of the DDRE1 bit in data
direction register E (DDRE).
•
•
PTE0/TxD — Transmit data
PTE1/RxD — Receive data
Serial Communications Interface (SCI)
MC68HC708AS48
MOTOROLA
—
Rev. 4.0
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