MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 274

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Serial Communications Interface (SCI)
Advance Information
274
NOTE:
Address:
SCTE — SCI Transmitter Empty Bit
Setting the TE bit for the first time also sets the SCTE bit. Setting the TE
and SCTIE bits generates an SCI transmitter CPU request.
TC — Transmission Complete Bit
Reset:
Read:
Write:
This clearable, read-only bit is set when the SCDR transfers a
character to the transmit shift register. SCTE can generate an SCI
transmitter CPU interrupt request. When the SCTIE bit in SCC2 is set,
SCTE generates an SCI transmitter CPU interrupt request. In normal
operation, clear the SCTE bit by reading SCS1 with SCTE set and
then writing to SCDR. Reset sets the SCTE bit.
This read-only bit is set when the SCTE bit is set and no data,
preamble, or break character is being transmitted. TC generates an
SCI transmitter CPU interrupt request if the TCIE bit in SCC2 is also
set. TC is cleared automatically when data, preamble, or break
character is queued and ready to be sent. There may be up to 1.5
transmitter clocks of latency between queueing data, preamble, and
break character and the transmission actually starting. Reset sets the
TC bit.
1 = SCDR data transferred to transmit shift register
0 = SCDR data not transferred to transmit shift register
1 = No transmission in progress
0 = Transmission in progress
Serial Communications Interface (SCI)
$0016
SCTE
Bit 7
R
R
1
Figure 17-12. SCI Status Register 1 (SCS1)
= Reserved
TC
R
6
1
SCRF
R
5
0
IDLE
R
4
0
OR
R
3
0
MC68HC708AS48
NF
R
2
0
FE
R
1
0
MOTOROLA
—
Rev. 4.0
Bit 0
PE
R
0