MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 296

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Serial Peripheral Interface (SPI)
18.7 Error Conditions
18.7.1 Overflow Error
Advance Information
296
Two flags signal SPI error conditions:
The overflow flag (OVRF in SPSCR) becomes set if the SPI receive data
register still has unread data from a previous transmission when the
capture strobe of bit 1 of the next transmission occurs. (See
and
transferred to the receive data register so that the unread data can still
be read. Therefore, an overflow error always indicates the loss of data.
OVRF generates a receiver/error CPU interrupt request if the error
interrupt enable bit (ERRIE in SPSCR) is also set. MODF and OVRF can
generate a receiver/error CPU interrupt request. (See
is not possible to enable only MODF or OVRF to generate a
receiver/error CPU interrupt request. However, leaving MODFEN low
prevents MODF from being set.
If an end-of-block transmission interrupt was meant to pull the MCU out
of wait, having an overflow condition without overflow interrupts enabled
causes the MCU to hang in wait mode. If the OVRF is enabled to
generate an interrupt, it can pull the MCU out of wait mode instead.
If the CPU SPRF interrupt is enabled and the OVRF interrupt is not,
watch for an overflow condition.
miss an overflow.
1. Overflow (OVRFin SPSCR) — Failing to read the SPI data register
2. Mode fault error (MODF in SPSCR) — The MODF bit indicates
Figure
before the next byte enters the shift register sets the OVRF bit.
The new byte does not transfer to the receive data register, and
the unread byte still can be read by accessing the SPI data
register. OVRF is in the SPI status and control register.
that the voltage on the slave select pin (SS) is inconsistent with the
mode of the SPI. MODF is in the SPI status and control register.
Serial Peripheral Interface (SPI)
18-6.) If an overflow occurs, the data being received is not
Figure 18-8
shows how it is possible to
MC68HC708AS48
Figure
Figure 18-4
MOTOROLA
18-10.) It
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Rev. 4.0