MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 231

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
16.9.2 TIM Counter Registers
MC68HC708AS48
MOTOROLA
NOTE:
Rev. 4.0
The two read-only TIM counter registers contain the high and low bytes
of the value in the TIM counter. Reading the high byte (TCNTH) latches
the contents of the low byte (TCNTL) into a buffer. Subsequent reads of
TCNTH do not affect the latched TCNTL value until TCNTL is read.
Reset clears the TIM counter registers. Setting the TIM reset bit (TRST)
also clears the TIM counter registers.
If TCNTH is read during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset:
Reset:
Read:
Read:
Write:
Write:
Register Name and Address: TCNTH — $0022
Register Name and Address: TCNTL — $0023
Figure 16-5. TIM Counter Registers (TCNTH and TCNTL)
Bit 15
Bit 7
Bit 7
Bit 7
R
R
R
0
0
Timer Interface (TIM)
= Reserved
Bit 14
Bit 6
R
R
6
0
6
0
Bit 13
Bit 5
R
R
5
0
5
0
Bit 12
Bit 4
R
R
4
0
4
0
Bit 11
Bit 3
R
R
3
0
3
0
Bit 10
Bit 2
R
R
2
0
2
0
Timer Interface (TIM)
Advance Information
Bit 9
Bit 1
R
R
1
0
1
0
I/O Registers
Bit 0
Bit 8
Bit 0
Bit 0
R
R
0
0
231

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