HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 194
HD64F2676VFC33
Manufacturer Part Number
HD64F2676VFC33
Description
IC H8S MCU FLASH 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Specifications of HD64F2676VFC33
Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Section 6 Bus Controller (BSC)
Bit
2
1
0
Rev. 3.00 Mar 17, 2006 page 142 of 926
REJ09B0283-0300
Bit Name
MXC2
MXC1
MXC0
Initial Value
0
0
0
R/W
R/W
R/W
R/W
Description
Address Multiplex Select
These bits select the size of the shift toward the
lower half of the row address in row
address/column address multiplexing. In burst
operation on the DRAM/synchronous DRAM
interface, these bits also select the row address
bits to be used for comparison.
When the MXC2 bit is set to 1 while continuous
synchronous DRAM space is set, the address
precharge setting command (Precharge-sel) is
output to the upper column address. For details,
refer to sections 6.6.2 and 6.7.2, Address
Multiplexing.
DRAM interface
000: 8-bit shift
001: 9-bit shift
010: 10-bit shift
When 8-bit access space is designated:
Row address bits A23 to A8 used for
comparison
When 16-bit access space is designated:
Row address bits A23 to A9 used for
comparison
When 8-bit access space is designated:
Row address bits A23 to A9 used for
comparison
When 16-bit access space is designated:
Row address bits A23 to A10 used for
comparison
When 8-bit access space is designated:
Row address bits A23 to A10 used for
comparison
When 16-bit access space is designated:
Row address bits A23 to A11 used for
comparison
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