HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 428

• Manufacturer Part Number: HD64F2676VFC33
• Description: IC H8S MCU FLASH 256K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2676VFC33

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 8 EXDMA Controller
8.4.10
Single Address Mode (Read): Figure 8.22 shows an example of transfer when ETEND output is
enabled, and byte-size, single address mode transfer (read) is performed from external 8-bit, 2-
state access space to an external device.
Figure 8.23 shows an example of transfer when ETEND output is enabled, and word-size, single
address mode transfer (read) is performed from external 8-bit, 2-state access space to an external
device.
After one byte or word has been transferred in response to one transfer request, the bus is released.
While the bus is released, one or more CPU, DMAC, or DTC bus cycles are initiated.
Rev. 3.00 Mar 17, 2006 page 376 of 926
REJ09B0283-0300
Address bus
RD
EDACK
ETEND
Address bus
RD
EDACK
ETEND
Bus release
EXDMAC Bus Cycles (Single Address Mode)
Figure 8.23 Example of Single Address Mode (Word Read) Transfer
Figure 8.22 Example of Single Address Mode (Byte Read) Transfer
Bus release
DMA read
DMA read
Bus release
Bus release
DMA read
Bus release
DMA read
DMA read
Bus release
Bus release
DMA read
Last transfer cycle
transfer
cycle
Last
DMA read
Bus release
Bus
release