HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 253
HD64F2676VFC33
Manufacturer Part Number
HD64F2676VFC33
Description
IC H8S MCU FLASH 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Specifications of HD64F2676VFC33
Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Table 6.9
Pin
CS2
CS3
CS4
CS5
(OE)
UCAS
LCAS
A15 to A0
D15 to D0
DCTL
Synchronous DRAM Interface Pins
With
Synchronous
DRAM Setting
RAS
CAS
WE
SDRAM
(CKE)
DQMU
DQML
A15 to A0
D15 to D0
DCTL
Name
Row address strobe
Column address
strobe
Write enable
Clock
Clock enable
Upper data mask
enable
Lower data mask
enable
Address pins
Data pins
Device control pin
Output
I/O
I/O
Output
Output
Output
Output
Output
Output
Output
Input
Rev. 3.00 Mar 17, 2006 page 201 of 926
Section 6 Bus Controller (BSC)
Function
Row address strobe when
areas 2 to 5 are designated
as continuous synchronous
DRAM space
Column address strobe when
areas 2 to 5 are designated
as continuous synchronous
DRAM space
Write enable strobe when
areas 2 to 5 are designated
as continuous synchronous
DRAM space
Clock only for synchronous
DRAM
Clock enable signal when
areas 2 to 5 are designated
as continuous synchronous
DRAM space
Upper data mask enable for
16-bit continuous
synchronous DRAM space
access/data mask enable for
8-bit continuous synchronous
DRAM space access
Lower data mask enable
signal for 16-bit continuous
synchronous DRAM space
access
Row address/column
address multiplexed output
pins
Data input/output pins
Output enable pin for
SDRAM
REJ09B0283-0300
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