HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 256

IC H8S MCU FLASH 256K 144-QFP

HD64F2676VFC33

Manufacturer Part Number
HD64F2676VFC33
Description
IC H8S MCU FLASH 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2676VFC33

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 6 Bus Controller (BSC)
6.7.7
CAS latency is controlled by settings of the W22 to W20 bits of WTCRB. Set the CAS latency
count, as shown in table 6.10, by the setting of synchronous DRAM. Depending on the setting, the
CAS latency control cycle (T
AST2 bit of ASTCR. Figure 6.45 shows the CAS latency control timing when synchronous
DRAM of CAS latency 3 is connected.
The initial value of W22 to W20 is H'7. Set the register according to the CAS latency of
synchronous DRAM to be connected.
Table 6.10 Setting CAS Latency
W22
0
1
Rev. 3.00 Mar 17, 2006 page 204 of 926
REJ09B0283-0300
CAS Latency Control
W21
0
1
0
1
W20
0
1
0
1
0
1
0
1
c1
Description
Connect synchronous DRAM of
CAS latency 1
Connect synchronous DRAM of
CAS latency 2
Connect synchronous DRAM of
CAS latency 3
Connect synchronous DRAM of
CAS latency 4
Reserved (must not used)
Reserved (must not used)
Reserved (must not used)
Reserved (must not used)
) is inserted. WTCRB can be set regardless of the setting of the
CAS Latency Control Cycle
Inserted
0 state
1 state
2 states
3 states

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