HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 879
HD64F2676VFC33
Manufacturer Part Number
HD64F2676VFC33
Description
IC H8S MCU FLASH 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Specifications of HD64F2676VFC33
Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Setting Oscillation Stabilization Time after Clearing Software Standby Mode: Bits STS3 to
STS0 in SBYCR should be set as described below.
IRQ15 is generated. Software standby mode cannot be cleared if the interrupt has been masked
on the CPU side or has been designated as a DTC activation source.
Clearing with the RES Pin
When the RES pin is driven low, clock oscillation is started. At the same time as clock
oscillation starts, clocks are supplied to the entire LSI. Note that the RES pin must be held low
until clock oscillation stabilizes. When the RES pin goes high, the CPU begins reset exception
handling.
Clearing with the STBY Pin
When the STBY pin is driven low, a transition is made to hardware standby mode.
Using a Crystal Oscillator
Set bits STS3 to STS0 so that the standby time is more than the oscillation stabilization time.
Table 22.2 shows the standby times for operating frequencies and settings of bits STS3 to
STS0.
Using an External Clock
A PLL circuit stabilization time is necessary. Refer to table 22.2 to set the wait time.
Rev. 3.00 Mar 17, 2006 page 827 of 926
Section 22 Power-Down Modes
REJ09B0283-0300
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