HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 466

IC H8S MCU FLASH 256K 144-QFP

HD64F2676VFC33

Manufacturer Part Number
HD64F2676VFC33
Description
IC H8S MCU FLASH 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2676VFC33

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2676VFC33
Manufacturer:
RENESAS
Quantity:
5 530
Part Number:
HD64F2676VFC33
Quantity:
9 520
Part Number:
HD64F2676VFC33
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F2676VFC33V
Manufacturer:
RENESAS
Quantity:
5 530
Part Number:
HD64F2676VFC33V
Manufacturer:
ROHM
Quantity:
750 000
Part Number:
HD64F2676VFC33V
Manufacturer:
RENESAS
Quantity:
120
Part Number:
HD64F2676VFC33V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 9 Data Transfer Controller (DTC)
9.5.3
In block transfer mode, one operation transfers one block of data. Either the transfer source or the
transfer destination is designated as a block area. Table 9.5 lists the register function in block
transfer mode.
The block size is 1 to 256. When the transfer of one block ends, the initial state of the block size
counter and the address register specified as the block area is restored. The other address register
is then incremented, decremented, or left fixed. From 1 to 65,536 transfers can be specified. Once
the specified number of transfers has ended, a CPU interrupt is requested.
Table 9.5
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
Rev. 3.00 Mar 17, 2006 page 414 of 926
REJ09B0283-0300
SAR
or
DAR
Block Transfer Mode
Register Function in Block Transfer Mode
Figure 9.6 Memory Mapping in Repeat Mode
Repeat area
Abbreviation
SAR
DAR
CRAH
CRAL
CRB
Transfer
Function
Designates source address
Designates destination address
Holds block size
Designates block size count
Designates transfer count
DAR
or
SAR

Related parts for HD64F2676VFC33