HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 492

• Manufacturer Part Number: HD64F2676VFC33
• Description: IC H8S MCU FLASH 256K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2676VFC33

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 10 I/O Ports
Notes: 1. TIOCC0 input when MD3 to MD0 = B'0000 and IOC3 to IOC0 = B'10xx.
x: Don’t care
Note:
Rev. 3.00 Mar 17, 2006 page 440 of 926
REJ09B0283-0300
TPU channel 0
settings
P12DDR
NDER10
Pin function
TPU channel 0
settings
MD3 to MD0
IOC3 to IOC0
CCLR2, CCLR0
Output function
P12/PO10/TIOCC0/TCLKA
The pin function is switched as shown below according to the combination of the TPU channel
0 settings (by bits MD3 to MD0 in TMDR0, bits IOC3 to IOC0 in TIOR0L, and bits CCLR2
to CCLR0 in TCR0), bits TPSC2 to TPSC0 in TCR0 to TCR5, bit NDER10 in NDERH, and
bit P12DDR.
2. TCLKA input when the setting for any of TCR0 to TCR5 is TPSC2 to TPSC0 = B'100.
3. TIOCD0 output disabled.
TCLKA input when phase counting mode is set for channels 1 and 5.
Output disabled and settings (2) effective when BFA = 1 or BFB = 1 in TMDR0.
TIOCC0 output
B'0000
B'0100
B'1xxx
(1) in table
(2)
—
—
below
—
—
B'0001 to B'0011
B'0101 to B'0111
Output compare
B'0000
output
(1)
—
P12 input
—
0
TCLKA input *
B'001x
B'xx00
(2)
—
—
(2) in table below
TIOCC0 input *
P12 output
mode 1
PWM *
B'0010
B'xx00
output
Other
2
than
(1)
1
0
—
3
Other than B'xx00
mode 2
output
1
Other
B'101
PWM
than
(1)
PO10 output
B'0011
1
1
B'101
(2)
—