ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 116
ez80f91
Manufacturer Part Number
ez80f91
Description
Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F91.pdf
(387 pages)
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Flash Interrupt Control Register
There are two sources of interrupts from the Flash controller. These two sources are:
•
•
Either or both of these two interrupt sources are enabled by setting the appropriate bits in
the Flash Interrupt Control register.
The Flash Interrupt Control register contains four status bits to indicate the following error
conditions:
Row Program Time-Out—
current row program operation does not complete within 4864 Flash controller clocks,
the Flash controller terminates the row program operation by clearing bit 2 of the Flash
Program Control Register and sets the RP_TM0 error bit to 1.
Write Violation—
memory (the Write was not performed).
Page Erase Violation—
memory (the requested page was not erased).
Mass Erase Violation—
one or more protected blocks in Flash memory (the MASS ERASE was not performed).
If the error condition interrupt is enabled, any of these four error conditions result in an
interrupt request being sent to the eZ80F91device’s interrupt controller. Reading the Flash
Interrupt Control register clears all error condition flags and the DONE flag. See
on page 109.
Bit Position
[1]
BLK1_PROT
[0]
BLK0_PROT
Note: The lower 32 KB block (00000h to 07FFFh—BLK0) is called the Boot block and is protected
Page Erase, Mass Erase, or Row Program completed successfully.
An error condition occurred.
using the external WP pin.
This bit indicates an attempt to write to a protected block of Flash
Value Description
0
1
0
1
This bit indicates an attempt to erase a protected block of Flash
This bit indicates an attempt to MASS ERASE when there are
Disable Write/Erase Protect on block 08000h to 0FFFFh.
Enable Write/Erase Protect on block 08000h to 0FFFFh.
Disable Write/Erase Protect on block 00000h to 07FFFh.
Enable Write/Erase Protect on block 00000h to 07FFFh.
This bit signals a time-out during Row Programming. If the
Product Specification
eZ80F91 ASSP
Flash Memory
Table 42
108
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