ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 144

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

PS027001-0707
Timer Data Register—Low Byte
The Timer x Data Register—Low Byte returns the Low byte of the current count value of
the selected timer. The Timer Data Register—Low Byte (see
timer is in operation. Reading the current count value does not affect timer
operation. To read the 16-bit data of the current count value, {TMRx_DR_H[7:0],
TMRx_DR_L[7:0]}, first read the Timer Data Register—Low Byte, followed by the
Timer Data Register—High Byte. The Timer Data Register—High Byte value is latched
into temporary storage when a Read of the Timer Data Register—Low Byte occurs.
This register shares its address with the corresponding timer reload register.
Table 57. Timer Data Register—Low Byte
0068h, TMR2_DR_L = 0072h, TMR3_DR_L = 0077h)
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMR_DR_L
Value
00h–FFh
R
7
0
Description
These bits represent the Low byte of the 2-byte timer data
value, {TMR
of the 16-bit timer data value. Bit 0 is bit 0 (lsb) of the 16-bit
timer data value.
R
6
0
x
_DR_H[7:0], TMR
R
5
0
(TMR0_DR_L = 0063h, TMR1_DR_L =
R
4
0
R
3
0
Table
x
Programmable Reload Timers
_DR_L[7:0]}. Bit 7 is bit 7
Product Specification
57) is read when the
R
2
0
eZ80F91 ASSP
R
1
0
R
0
0
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