ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 211
ez80f91
Manufacturer Part Number
ez80f91
Description
Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F91.pdf
(387 pages)
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Serial Peripheral Interface
PS027001-0707
The Serial Peripheral Interface (SPI) is a synchronous interface allowing several SPI-type
devices to be interconnected. The SPI is a full-duplex, synchronous, character-oriented
communication channel that employs a four-wire interface. The SPI block consists of a
transmitter, receiver, baud rate generator, and control unit. During an SPI transfer, data is
sent and received simultaneously by both the master and the slave SPI devices.
In a serial peripheral interface, separate signals are required for data and clock. The SPI is
configured either as a master or as a slave. The connection of two SPI devices (one master
and one slave) and the direction of data transfer is demonstrated in
Figure
DATAIN
ENABLE
DATAIN
CLKIN
41.
SS
MISO
SS
MOSI
SCK
Bit 0
Baud Rate
Figure 40. SPI Master Device
Generator
Bit 0
8-Bit Shift Register
Figure 41. SPI Slave Device
MASTER
8-Bit Shift Register
SLAVE
Bit 7
Bit 7
SCK
MISO
DATAOUT
CLKOUT
Product Specification
DATAOUT
Serial Peripheral Interface
Figure 40
eZ80F91 ASSP
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