ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 316

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

Table 186. EMAC Station Address Register (EMAC_STAD_0 = 0025h, EMAC_STAD_1 =
EMAC_STAD_5 = 002Ah)
PS027001-0707
0026h, EMAC_STAD_2 = 0027h, EMAC_STAD_3 = 0028h, EMAC_STAD_4 = 0029h,
Bit
EMAC_STAD_0 Reset
EMAC_STAD_1 Reset
EMAC_STAD_2 Reset
EMAC_STAD_3 Reset
EMAC_STAD_4 Reset
EMAC_STAD_5 Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
EMAC_STAD_x
the sixth byte Destination Address (DA) field of the Receive frame. EMAC_STAD_0 is
matched against the first byte of the Receive frame, and EMAC_STAD_5 is matched
against the sixth byte of the Receive frame. Bit 0 of EMAC_STAD_0 (STAD[40]) is
matched against the first bit (Unicast/Multicast bit) of the first byte of the Receive
frame. This bit ordering is used to logically map the PE-MACMII station address as
illustrated below.
EMAC_STAD0[7:0] contains STAD[47:40]
....
....
EMAC_STAD5[7:0] contains STAD[7:0]
The second function of the EMAC Station Address registers is to provide the Source
Address (SA) field of Transmit Pause frames when these frames are transmitted by the
EMAC. EMAC_STAD_0 provides the first byte of the 6 byte SA field and
EMAC_STAD_5 provides the final byte of the SA field in order of transmission. The LSB
is the first byte sent out. The EMAC Station Address register is detailed in
Value
00h–FFh This 48-bit station address comprises {EMAC_STAD_5,
R/W
Description
EMAC_STAD_4, EMAC_STAD_3, EMAC_STAD_2,
EMAC_STAD_1, EMAC_STAD_0}.
7
0
0
0
0
0
0
R/W
6
0
0
0
0
0
0
R/W
5
0
0
0
0
0
0
R/W
4
0
0
0
0
0
0
R/W
3
0
0
0
0
0
0
R/W
2
0
0
0
0
0
0
Ethernet Media Access Controller
R/W
1
0
0
0
0
0
0
Product Specification
R/W
0
0
0
0
0
0
0
eZ80F91 ASSP
Table
186.
308