ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 362

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

Table 240. External I/O Read Timing (Continued)
PS027001-0707
Parameter
T
T
T
8
9
10
External I/O Write Timing
ADDR[23:0]
DATA[7:0]
(output)
IORQ
Abbreviation
PHI Clock Rise to IORQ Deassertion Delay
PHI Clock Rise to RD Assertion Delay
PHI Clock Rise to RD Deassertion Delay
CSx
WR
PHI
Figure 71
rise/fall to signal transition timing is independent of the particular bus mode employed
(eZ80, Z80, Intel, or Motorola).
and
T
Table 241
7
T
Figure 71. External I/O Write Timing
T
1
5
on page 355 display the timing for external I/O Writes. PHI clock
T
CLK
T
3
T
9
Minimum
1.0
2.7
0.5
Delay (ns)
T
10
T
T
T
4
2
T
6
8
Maximum
6.3
6.3
7.0
Product Specification
Electrical Characteristics
eZ80F91 ASSP
354