ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 277

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

Phase-Locked Loop
PS027001-0707
Overview
(1MHz < F
The Phase-Locked-Loop (PLL) is a programmable frequency multiplier that satisfies the
equation SCLK (Hz) = N * F
PLL includes seven main blocks as listed below:
•
•
•
•
•
•
•
x2
x1
Phase Frequency Detector
Charge Pump
Voltage Controlled Oscillator
Loop Filter
Divider
MUX/CLK Sync
Lock Detect
Oscillator
PLL_INT
OSC
Figure 57. Phase-Locked Loop Block Diagram
< 10MHz)
PLL_CTL0[3:2]
Detect
Lock
PFD
{PLL_DIV_H, PLL_DIV_L}
(F
OSC
OSC
RTC_CLK
PLL_CTL0[7:6]
System Clock
(Hz).
< SCLK < F
SCLK-MUX
Charge
Pump
Div N
Figure 57
OSC
* N)
illustrates the PLL block diagram.
VCO
PLL_CTL1[0] = PLL Enable
Product Specification
C
Loop Filter
PLL1
Off-Chip
Phase-Locked Loop
eZ80F91 ASSP
R
C
PLL
PLL2
269