ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 249

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

PS027001-0707
ZDA
ZCL
Note:
ZDI Read Operations
ZDA
ZCL
ZDI Address
ZDI Address
lsb of
A0
7
ZDI Single-Byte Read
Single-byte Read operations are initiated in the same manner as single-byte Write opera-
tions, with the exception that the R/W bit of the ZDI register address is set to 1. Upon
receipt of a slave address with the R/W bit set to 1, the eZ80F91 device’s ZDI block loads
the selected data into the shifter at the beginning of the first cycle following the single-bit
data separator. The most-significant bit (msb) is shifted out first.
timing for ZDI single-byte Read operations.
lsb of
In ZDI single-byte read operations, after each read operation, the Program Counter (PC)
address is incremented by two bytes. For example, if the current PC address is 0x00, then
A0
7
Write
8
Read
Byte Separator
8
Byte Separator
Single-Bit
Figure 55. ZDI Single-Byte Data Read Timing
Single-Bit
0/1
Figure 54. ZDI Block Data Write Timing
9
0/1
9
of DATA
of DATA
Byte 1
msb
D7
msb
D7
1
1
D6
D6
2
2
D5
3
D5
3
ZDI Data Byte
D4
ZDI Data Bytes
4
D1
7
of DATA
D3
Byte 1
5
D0
lsb
8
Byte Separator
Single-Bit
D2
6
0/1
9
D1
7
D7
Product Specification
Figure 55
1
of DATA
D0
lsb
8
of DATA
Zilog Debug Interface
Byte 2
START Signal
End of Data
msb
or New ZDI
D6
eZ80F91 ASSP
2
1
illustrates the
9
1
9
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