ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 25

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

PS027001-0707
Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP
Pin No
100
101
102
BGA
Pin No Symbol
E10
D12
F8
PB0
IC0
EC0
PB1
IC1
PB2
SS
Function
GPIO Port B
GPIO Port B
GPIO Port B
Input Capture
Event Counter Schmitt-trigger
Input Capture
SPI Slave
Select
Signal Direction Description
Bidirectional with
Schmitt-trigger
input
Schmitt-trigger
input
input
Bidirectional with
Schmitt-trigger
input
Schmitt-trigger
input
Bidirectional with
Schmitt-trigger
input
Schmitt-trigger
input, Active Low
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port B
pin, when programmed as output is
selected to be an open-drain or
open-source output.
Input Capture A Signal to Timer 1.
This signal is multiplexed with PB0.
Event Counter Signal to Timer 1.
This signal is multiplexed with PB0.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port B
pin, when programmed as output is
selected to be an open-drain or
open-source output.
Input Capture B Signal to Timer 1.
This signal is multiplexed with PB1.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port B
pin, when programmed as output is
selected to be an open-drain or
open-source output.
The slave select input line is used to
select a slave device in SPI mode.
This signal is multiplexed with PB2.
Product Specification
Architectural Overview
eZ80F91 ASSP
17