ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 265

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

Table 146. ZDI Status Register
PS027001-0707
Bit
Reset
CPU Access
Note: R = Read Only.
Bit
Position
7
zdi_active
6
5
halt_SLP
4
ADL
3
MADL
2
IEF1
[1:0]
Reserved
ZDI Status Register
The ZDI Status register provides current information on the eZ80F91 device and the CPU.
See
Table
Value Description
0
1
0
0
1
0
1
0
1
0
1
00
146.
R
7
0
The CPU is not functioning in ZDI mode.
The CPU is currently functioning in ZDI mode.
Reserved.
The CPU is not currently in HALT or SLEEP mode.
The CPU is currently in HALT or SLEEP mode.
The CPU is operating in Z80 MEMORY mode.
(ADL bit = 0)
The CPU is operating in ADL MEMORY mode.
(ADL bit = 1)
The CPU’s Mixed-Memory mode (MADL) bit is reset to 0.
The CPU’s Mixed-Memory mode (MADL) bit is set to 1.
The CPU’s Interrupt Enable Flag 1 is reset to 0. Maskable
interrupts are disabled.
The CPU’s Interrupt Enable Flag 1 is set to 1. Maskable
interrupts are enabled.
Reserved.
R
(ZDI_STAT = 03h in the ZDI Register Read Only Address Space)
6
0
R
5
0
R
4
0
R
3
0
R
2
0
R
1
0
Product Specification
R
0
0
Zilog Debug Interface
eZ80F91 ASSP
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