ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 324
ez80f91
Manufacturer Part Number
ez80f91
Description
Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F91.pdf
(387 pages)
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Table 197. EMAC Hash Table Register (EMAC_HTBL_0 = 0033h, EMAC_HTBL_1 = 0034h,
EMAC_HTBL_2 = 0035h, EMAC_HTBL_3 = 0036h, EMAC_HTBL_4 = 0037h, EMAC_HTBL_5
= 0038h, EMAC_HTBL_6 = 0039h, EMAC_HTBL_7 = 003Ah)
PS027001-0707
Bit
EMAC_HTBL_0 Reset
EMAC_HTBL_1 Reset
EMAC_HTBL_2 Reset
EMAC_HTBL_3 Reset
EMAC_HTBL_4 Reset
EMAC_HTBL_5 Reset
EMAC_HTBL_6 Reset
EMAC_HTBL_7 Reset
CPU Access
Note: R/W = Read/Write
Bit
Position
[7:0]
EMAC_HTBL_x
EMAC Hash Table Register
The EMAC Hash Table Register represents the 8x8 hash table matrix. This table is used as
an option to select between different multicast addresses. If a multicast address is
received, the first 6 bits of the CRC are decoded and added to a table that points to a single
bit within the hash table matrix. If the selected bit = 1, the multicast packet is accepted. If
the bit = 0, the multicast packet is rejected. See
Value
00h–
FFh
R/W
Description
This field is the hash table. The 64 bit hash table is
{EMAC_HTBL_7, EMAC_HTBL_6, EMAC_HTBL_5,
EMAC_HTBL_4, EMAC_HTBL_3, EMAC_HTBL_2,
EMAC_HTBL_1, EMAC_HTBL_0}.
7
0
0
0
0
0
0
0
0
R/W
6
0
0
0
0
0
0
0
0
R/W
5
0
0
0
0
0
0
0
0
R/W
4
0
0
0
0
0
0
0
0
R/W
3
0
0
0
0
0
0
0
0
Table
R/W
2
0
0
0
0
0
0
0
0
197.
Ethernet Media Access Controller
R/W
1
0
0
0
0
0
0
0
0
Product Specification
R/W
0
0
0
0
0
0
0
0
0
eZ80F91 ASSP
316
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