ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 74
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ez80f91
Manufacturer Part Number
ez80f91
Description
Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F91.pdf
(387 pages)
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eZ80F91 ASSP
Product Specification
66
If the upper and lower bounds are set to the same value (CSx_UBR = CSx_LBR), then a
particular chip select is valid for a single 64 KB page.
Memory Chip Select Priority
A lower-numbered chip select is granted priority over a higher-numbered chip select. For
example, if the address space of chip select 0 overlaps the chip select 1 address space, then
chip select 0 is active. If the address range programmed for any chip select signal overlaps
with the address of internal memory, the internal memory is accorded higher priority. If
the particular chip select(s) are configured with an address range that overlaps with an
internal memory address and when the internal memory is accessed, the chip select signal
is not asserted.
Reset States
On RESET, chip select 0 is active for all addresses, because its Lower Bound register
resets to
and its Upper Bound register resets to
. All the other chip select Lower
00h
FFh
and Upper Bound registers reset to
.
00h
Memory Chip Select Example
The use of Memory chip selects is demonstrated in
Figure
7on page 67. The associated
control register values are indicated in
Table 18
on page 67. In this example, all 4 chip
selects are enabled and configured for memory addresses. Also, CS1 overlaps with CS0.
Because CS0 is prioritized higher than CS1, CS1 is not active for much of its defined
address space.
PS027001-0707
Chip Selects and Wait States
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