ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 248

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

PS027001-0707
ZDA
ZCL
ZDI Write Operations
ZDI Address
lsb of
A0
ZDI Single-Byte Write
For single-byte Write operations, the address and write control bit are first written to the
ZDI block. Following the single-bit byte separator, the data is shifted into the ZDI block
on the next 8 rising edges of ZCL. The master terminates activity after 8 clock cycles.
Figure 53
ZDI Block Write
The block Write operation is initiated in the same manner as the single-byte Write opera-
tion, but instead of terminating the Write operation after the first data byte is transferred,
the ZDI master continues to transmit additional bytes of data to the ZDI slave on the
eZ80F91 device. After the receipt of each byte of data the ZDI register address increments
by 1. If the ZDI register address reaches the end of the Write Only ZDI register address
space (
Write operations.
7
Write
30h
8
Byte Separator
illustrates the timing for ZDI single-byte Write operations.
Figure 53. ZDI Single-Byte Data Write Timing
Single-Bit
), the address stops incrementing.
0/1
9
of DATA
msb
D7
1
D6
2
D5
3
ZDI Data Byte
D4
4
Figure 54
D3
5
D2
illustrates the timing for ZDI block
6
D1
7
Product Specification
of DATA
D0
lsb
8
Zilog Debug Interface
START Signal
eZ80F91 ASSP
End of Data
or New ZDI
1
9
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