ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 310

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

Table 180. EMAC Test Register
PS027001-0707
Bit
Reset
CPU Access
Note: R/W = Read/Write, R = Read Only.
Bit
Position
7
6
TEST_FIFO
5
TxRx_SEL
4
SSTC
3
SIMR
2
FRC_OVR_ERR
1
FRC_UND_ERR
0
LPBK
EMAC Test Register
The EMAC Test Register allows test functionality of the EMAC block. Available test
modes are defined for bits [6:0]. See
Value
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
R
7
0
Description
Reserved.
FIFO test mode disabled—Normal operation.
FIFO test mode enabled.
Select the Receive FIFO when FIFO test mode is enabled.
Select the Transmit FIFO when FIFO test mode is enabled.
Normal operation.
Short Cut Slot Timer Counter. Slot time is shortened to
speed up simulation.
Normal operation.
Simulation Reset.
Normal operation.
Force Overrun error in Receive FIFO.
Normal operation.
Force Underrun error in Transmit FIFO.
Normal operation.
EMAC Transmit interface is looped back into EMAC Receive
interface.
R/W
6
0
(EMAC_ TEST = 0020h)
R/W
5
0
R/W
4
0
Table
R/W
180.
3
0
R/W
2
0
R/W
Ethernet Media Access Controller
1
0
Product Specification
R/W
0
0
eZ80F91 ASSP
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