ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 20
ez80f91
Manufacturer Part Number
ez80f91
Description
Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F91.pdf
(387 pages)
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Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP
Pin No
75
76
77
BGA
Pin No Symbol
L11
K10
J9
PD2
RTS0
PD3
CTS0
PD4
DTR0
Function
GPIO Port D
Request to
Send
GPIO Port D
Clear to Send
GPIO Port D
Data Terminal
Ready
Signal Direction Description
Bidirectional
Output,
Active Low
Bidirectional
Input, Active Low Modem status signal to the UART.
Bidirectional
Output,
Active Low
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port D
pin, when programmed as output is
selected to be an open-drain or
open-source output. Port D is
multiplexed with one UART.
Modem control signal from UART.
This signal is multiplexed with PD2.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port D
pin, when programmed as output is
selected to be an open-drain or
open-source output. Port D is
multiplexed with one UART.
This signal is multiplexed with PD3.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port D
pin, when programmed as output is
selected to be an open-drain or
open-source output. Port D is
multiplexed with one UART.
Modem control signal to the UART.
This signal is multiplexed with PD4.
Product Specification
Architectural Overview
eZ80F91 ASSP
12
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