HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 15

• Manufacturer Part Number: HD6475328-CP10
• Description: original Hitachi CMOS microcomputer unit (MCU)
• Manufacturer: HITACHI [Hitachi Semiconductor]

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Square-Wave Output (Example) ····················································································200
FRC Write-Clear Contention ·························································································201
FRC Write-Increment Contention ·················································································202
Contention between OCR Write and Compare-Match ··················································203
Block Diagram of 8-Bit Timer ·······················································································208
Count Timing for External Clock Input ·········································································215
Setting of Compare-Match Flags ···················································································216
Timing of Timer Output ·································································································216
Timing of Compare-Match Clear ··················································································217
Timing of External Reset ·······························································································217
Setting of Overflow Flag (OVF) ····················································································218
Example of Pulse Output ·······························································································219
TCNT Write-Clear Contention ······················································································220
TCNT Write-Increment Contention ··············································································221
Contention between TCOR Write and Compare-Match ···············································222
Block Diagram of PWM Timer ·····················································································228
PWM Timing ·················································································································233
Block Diagram of Timer Counter ··················································································236
Writing to TCNT and TCSR ··························································································239
Operation in Watchdog Timer Mode ·············································································241
Operation in Interval Timer Mode ·················································································242
Setting of OVF Bit ·········································································································243
TCNT Write-Increment Contention ··············································································244
Block Diagram of Serial Communication Interface ······················································246
Data Format in Asynchronous Mode ·············································································260
Phase Relationship between Clock Output and Transmit Data ·····································261
Data Format in Synchronous Mode ···············································································265
Sampling Timing (Asynchronous Mode) ······································································271
Block Diagram of A/D Converter ··················································································274
Read Access to A/D Data Register (When Register Contains H'AA40) ·······················280
A/D Operation in Single Mode (When Channel 1 is Selected) ·····································283
A/D Operation in Scan Mode (When Channels 0 to 2 are Selected) ·····························286
A/D Conversion Timing ·································································································288
Block Diagram of On-Chip RAM ·················································································291
Block Diagram of On-Chip ROM ·················································································296
Socket Adapter Pin Arrangements ·················································································298
Memory Map in PROM Mode ·······················································································299
High-Speed Programming Flowchart ············································································300
PROM Write/Verify Timing ··························································································302
Recommended Screening Procedure ·············································································303
NMI Timing of Software Standby Mode (Application Example) ·································311