HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 161
HD6475328-CP10
Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6475328-CP10.pdf
(459 pages)
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P1CR selects the functions of four of the port 1 pins. It also selects the input edge of the NMI pin.
At a reset and in the hardware standby mode, P1CR is initialized to H'87. It is not initialized in
the software standby mode.
Bit 7—Reserved: This bit cannot be modified and is always read as “1.”
Bit 6—Interrupt Request 1 Enable (IRQ
Bit 6
IRQ
0
1
Bit 5—Interrupt Request 0 Enable (IRQ
Bit 5
IRQ
0
1
Bit 4—Nonmaskable Interrupt Edge (NMIEG): This bit selects the input edge of the NMI pin.
It is not related to port 0.
Bit 4
NMIEG
0
1
Bit 3—Bus Release Enable (BRLE): This bit selects the functions of pins P1
valid only in the expanded modes (modes 1, 2, 3, and 4). In the single-chip mode, pins P1
P1
3
1
0
function as input/output pins regardless of the value of the BRLE bit.
E
E
Description
P1
P1
the CPU can still read the pin status by reading P1DR.)
Description
P1
P1
the CPU can still read the pin status by reading P1DR.)
Description
A nonmaskable interrupt is generated on the falling edge
of the input at the NMI pin.
A nonmaskable interrupt is generated on the rising edge
of the input at the NMI pin.
6
6
5
5
functions as an input/output pin.
functions as the IRQ
functions as an input/output pin.
functions as the IRQ
1
0
input pin, regardless of the value set in P1
input pin, regardless of the value set in P1
1
0
E): This bit selects the function of pin P1
E): This bit selects the function of pin P1
144
2
6
5
(Initial value)
(Initial value)
(Initial value)
and P1
DDR. (However,
DDR. (However,
6
5
.
.
3
. It is
2
and
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